Usb Transceiver Control Register 0 (Usbx_Usbtrc0) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

33.5.21 USB Transceiver Control register 0 (USBx_USBTRC0)

Includes signals for basic operation of the on-chip USB Full Speed transceiver and

configuration of the USB data connection that are not otherwise included in the USB Full

Speed controller registers.

Address: 4007_2000h base + 10Ch offset = 4007_210Ch

Generates a hard reset to USB. After this bit is set and the reset occurs, this bit is automatically cleared.

NOTE: This bit is always read as zero. Wait two USB clock cycles after setting this bit.

Normal USB module operation.

Returns the USB module to its reset state.

This field is reserved.

NOTE: Software must set this bit to 1b.

Asynchronous Resume Interrupt Enable

This bit, when set, allows the USB module to send an asynchronous wakeup event to the MCU upon

detection of resume signaling on the USB bus. The MCU then re-enables clocks to the USB module. It is

used for low-power suspend mode when USB module clocks are stopped or the USB transceiver is in

Suspend mode. Async wakeup only works in device mode.

USB asynchronous wakeup from suspend mode disabled.

USB asynchronous wakeup from suspend mode enabled. The asynchronous resume interrupt differs

from the synchronous resume interrupt in that it asynchronously detects K-state using the unfiltered

state of the D+ and D– pins. This interrupt should only be enabled when the Transceiver is

This field is reserved.

This read-only field is reserved and always has the value 0.

Freescale Semiconductor, Inc.

RECOVERY_INT

USBx_USBTRC0 field descriptions

Table continues on the next page...

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Chapter 33 Universal Serial Bus (USB) FS Subsystem

USB_RESUME_INT