Peripherals Supported; I2C Peripheral - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

• Affected pin mux:

• LPUART0(PTA1, PTA2)

• I2C0(PTB0, PTB1)

• SPI0(PTC4, PTC5, PTC6, PTC7)

• Affected peripheral registers:

• LPUART and LPUART clock source

You must re-configure the corresponding register to the

expected value, instead of relying on the default value.

13.4 Peripherals Supported

This section describes the peripherals supported by the Kinetis ROM Bootloader. To use

an interface for bootloader communications, the peripheral must be enabled in the BCA,

13-3. If the BCA is invalid (such as all 0xFF bytes), then all

peripherals will be enabled by default.

The Kinetis Bootloader in ROM supports loading data into flash via the I2C peripheral,

where the I2C peripheral serves as the I2C slave. A 7-bit slave address is used during the

Customizing an I2C slave address is also supported. This feature is enabled if the

Bootloader Configuration Area (BCA) (shown in

filled with 'kcfg') and the i2cSlaveAddress field is filled with a value other than 0xFF.

0x10 is used as the default I2C slave address.

The maximum supported I2C baud rate depends on corresponding clock configuration

field in the BCA. Typical supported baud rate is 400 kbps with factory settings. Actual

supported baud rate may be lower or higher than 400 kbps, depending on the actual value

of the clockFlags and the clockDivider fields.

Because the I2C peripheral serves as an I2C slave device, each transfer should be started

by the host, and each outgoing packet should be fetched by the host.

• An incoming packet is sent by the host with a selected I2C slave address and the

direction bit is set as write.

Freescale Semiconductor, Inc.

(SIM_SOPT2_PLLFLLSEL = 3)

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Chapter 13 Kinetis ROM Bootloader

13-3) is enabled (tag field is