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Chapter 31
Low-Power Timer (LPTMR)
31.1 Chip-specific LPTMR information
31.1.1 LPTMR instantiation information
The low-power timer (LPTMR) allows operation during all power modes. The LPTMR
can operate as a real-time interrupt or pulse accumulator. It includes a 2
time interrupt mode) or glitch filter (pulse accumulator mode).
The LPTMR can be clocked from the internal reference clock, the internal 1 kHz LPO,
OSCERCLK, or an external 32.768 kHz crystal.
An interrupt is generated (and the counter may reset) when the counter equals the value
in the 16-bit compare register.
31.1.2 LPTMR pulse counter input options
LPTMR_CSR[TPS] configures the input source used in pulse counter mode. The
following table shows the chip-specific input assignments for this field.
LPTMR_CSR[TPS]
00
01
10
11
Freescale Semiconductor, Inc.
Pulse counter input number
0
1
2
3
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
N
prescaler (real-
Chip input
CMP0 output
LPTMR_ALT1 pin
LPTMR_ALT2 pin
LPTMR_ALT3 pin
501
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