Llwu Flag 1 Register (Llwu_F1) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Memory map/register definition

Wakeup Module Enable For Module 0

Enables an internal module as a wakeup source input.

Internal module flag not used as wakeup source

Internal module flag used as wakeup source

18.4.6 LLWU Flag 1 register (LLWU_F1)

LLWU_F1 contains the wakeup flags indicating which wakeup source caused the MCU

to exit LLS or VLLS mode. For LLS, this is the source causing the CPU interrupt flow.

For VLLS, this is the source causing the MCU reset flow.

The external wakeup flags are read-only and clearing a flag is accomplished by a write of

a 1 to the corresponding WUFx bit. The wakeup flag (WUFx), if set, will remain set if

the associated WUPEx bit is cleared.

This register is reset on Chip Reset not VLLS and by reset

types that trigger Chip Reset not VLLS. It is unaffected by reset

types that do not trigger Chip Reset not VLLS. See the

Introduction

Address: 4007_C000h base + 5h offset = 4007_C005h

Wakeup Flag For LLWU_P7

Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To

clear the flag, write a 1 to WUF7.

LLWU_P7 input was not a wakeup source

LLWU_P7 input was a wakeup source

Wakeup Flag For LLWU_P6

Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To

clear the flag, write a 1 to WUF6.

LLWU_ME field descriptions (continued)

details for more information.

LLWU_F1 field descriptions

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KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.