Shifter Status Dma Enable (Flexio_Shiftsden); Shifter Control N Register (Flexio_Shiftctln) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

39.3.10 Shifter Status DMA Enable (FLEXIO_SHIFTSDEN)

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Address: 4005_F000h base + 30h offset = 4005_F030h
Bit 31 30 29 28 27 26
R
W
0 0 0 0 0 0
Reset
Field
31–4 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
SSDE Shifter Status DMA Enable
Enables DMA request generation when corresponding SSF is set.
0 Shifter Status Flag DMA request is disabled
1 Shifter Status Flag DMA request is enabled

39.3.11 Shifter Control N Register (FLEXIO_SHIFTCTLn)

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Address: 4005_F000h base + 80h offset + (4d × i), where i=0d to 3d
Bit 31 30 29
R
W
Reset 0 0 0
Bit 15 14 13
0
R
W
Reset 0 0 0
Freescale Semiconductor, Inc.
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
FLEXIO_SHIFTSDEN field descriptions
28 27 26 25
0
TIMSEL
0 0 0 0
12 11 10 9
PINSEL
0 0 0 0
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
17 16 15 14 13 12 11
0
0 0 0 0 0 0 0
Description
24 23 22 21
0 0 0
8 7 6
0 0 0
Chapter 39 FlexIO
10 9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
20 19 18
0
0 0 0 0
5 4 3 2
0
SMOD
0 0 0 0
2 1 0
SSDE
0 0 0
17 16
PINCFG
0 0
1 0
0 0
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