Clock Gating; Power Modes - NXP Semiconductors MKL27Z128VFM4 Reference Manual

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Chapter 7 Power Management

Peripheral Doze can therefore be used to disable selected bus masters or slaves for the

duration of WAIT or VLPW mode. It can also be used to disable selected bus slaves

immediately on entry into any stop mode (or Compute Operation), instead of waiting for

the bus masters to acknowledge the entry as part of the stop entry sequence. Finally, it

can be used to disable selected bus masters or slaves that should remain inactive during a

If the flash memory is not being accessed during WAIT and PSTOP modes, then the

Flash Doze mode can be used to reduce power consumption, at the expense of a slightly

longer wake-up when executing code and vectors from flash. It can also be used to reduce

power consumption during Compute Operation when executing code and vectors from

7.2.5 Clock gating

To conserve power, the clocks to most modules can be turned off using the SCGCx

registers in the SIM module. The bits of these registers are cleared after any reset, which

disables the clock to the corresponding module. Prior to initializing a module, set the

corresponding bit in the SCGCx register to enable the clock. Before turning off the clock,

make sure to disable the module. For more details, see the

Clock Distribution

The Power Management Controller (PMC) provides multiple power options to allow the

user to optimize power consumption for the level of functionality needed.

Depending on the stop requirements of the user application, a variety of stop modes are

available that provide state retention, partial power-down or full power-down of certain

logic and/or memory. I/O states are held in all modes of operation. The following table

compares the various power modes available.

For each run mode, there is a corresponding Wait and Stop mode. Wait modes are similar

to ARM Sleep modes. Stop modes (VLPS, STOP) are similar to ARM Sleep Deep mode.

The Very Low Power Run (VLPR) operating mode can drastically reduce runtime power

when the maximum bus frequency is not required to handle the application needs.

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.