Llwu Pin Enable 4 Register (Llwu_Pe4) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Field
7–6 Wakeup Pin Enable For LLWU_P11
WUPE11
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
5–4 Wakeup Pin Enable For LLWU_P10
WUPE10
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
3–2 Wakeup Pin Enable For LLWU_P9
WUPE9
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
WUPE8 Wakeup Pin Enable For LLWU_P8
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection

18.4.4 LLWU Pin Enable 4 register (LLWU_PE4)

LLWU_PE4 contains the field to enable and select the edge detect type for the external
wakeup input pins LLWU_P15–LLWU_P12.
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the
Introduction
Freescale Semiconductor, Inc.
LLWU_PE3 field descriptions
NOTE
details for more information.
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 18 Low-Leakage Wakeup Unit (LLWU)
Description
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