Status And Control Register 3 (Adcx_Sc3) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

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23.4.7 Status and Control Register 3 (ADCx_SC3)

The Status and Control Register 3 (SC3) controls the calibration, continuous convert, and
hardware averaging functions of the ADC module.
Address: 4003_B000h base + 24h offset = 4003_B024h
Bit
31
30
29
R
W
Reset
0
0
0
Bit
15
14
13
R
W
Reset
0
0
0
Field
31–8
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
7
Calibration
CAL
Begins the calibration sequence when set. This field stays set while the calibration is in progress and is
cleared when the calibration sequence is completed. CALF must be checked to determine the result of the
calibration sequence. Once started, the calibration routine cannot be interrupted by writes to the ADC
registers or the results will be invalid and CALF will set. Setting CAL will abort any current conversion.
6
Calibration Failed Flag
CALF
Displays the result of the calibration sequence. The calibration sequence will fail if SC2[ADTRG] = 1, any
ADC register is written, or any stop mode is entered before the calibration sequence completes. Writing 1
to CALF clears it.
0
Calibration completed normally.
1
Calibration failed. ADC accuracy specifications are not guaranteed.
Freescale Semiconductor, Inc.
28
27
26
25
0
0
0
0
12
11
10
9
0
0
0
0
0
ADCx_SC3 field descriptions
Table continues on the next page...
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 23 Analog-to-Digital Converter (ADC)
24
23
22
21
0
0
0
0
0
8
7
6
5
0
CAL
w1c
0
0
0
0
Description
20
19
18
17
0
0
0
0
4
3
2
1
AVGS
0
0
0
0
16
0
0
0
353

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