Sticky System Reset Status Register 0 (Rcm_Ssrs0) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Reset memory map and register descriptions

This field is reserved.

This read-only field is reserved and always has the value 0.

Boot ROM Configuration

Indicates the boot source, the boot source remains set until the next System Reset or software can write

logic one to clear the corresponding mode bit.

While either bit is set, the NMI input is disabled and the vector table is relocated to the ROM base address

at 0x1C00_0000. These bits should be cleared by writing logic one before executing any code from either

Flash or SRAM.

Boot from Flash

Boot from ROM due to BOOTCFG0 pin assertion

Boot form ROM due to FOPT[7] configuration

Boot from ROM due to both BOOTCFG0 pin assertion and FOPT[7] configuration

This field is reserved.

This read-only field is reserved and always has the value 0.

22.2.7 Sticky System Reset Status Register 0 (RCM_SSRS0)

This register includes status flags to indicate all reset sources since the last POR, LVD or

VLLS Wakeup that have not been cleared by software. Software can clear the status flags

by writing a logic one to a flag.

Address: 4007_F000h base + 8h offset = 4007_F008h

Sticky Power-On Reset

Indicates a reset has been caused by the power-on detection logic. Because the internal supply voltage

was ramping up at the time, the low-voltage reset (LVD) status bit is also set to indicate that the reset

occurred while the internal supply was below the LVD threshold.

Reset not caused by POR

Reset caused by POR

Sticky External Reset Pin

Indicates a reset has been caused by an active-low level on the external RESET pin.

RCM_MR field descriptions

RCM_SSRS0 field descriptions

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KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.