I2C Status Register (I2Cx_S) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Memory map/register definition

If any address matching occurs, S[IAAS] and S[TCF] are set. If the direction of transfer is known from

master to slave, then it is not required to check S[SRW]. With this assumption, DMA can also be used

in this case. In other cases, if the master reads data from the slave, then it is required to rewrite the

C1 register operation. With this assumption, DMA cannot be used.

When FACK = 1, an address or a data byte is transmitted.

36.4.4 I2C Status register (I2Cx_S)

Address: Base address + 3h offset

Transfer Complete Flag

Acknowledges a byte transfer; TCF is set on the completion of a byte transfer. This bit is valid only during

or immediately following a transfer to or from the I2C module. TCF is cleared by reading the I2C data

NOTE: In the buffer mode, TCF is cleared automatically by internal reading or writing the data register

Transfer in progress

Transfer complete

Addressed As A Slave

This bit is set by one of the following conditions:

• The calling address matches the programmed primary slave address in the A1 register, or matches

the range address in the RA register (which must be set to a nonzero value and under the condition

I2C_C2[RMEN] = 1).

• C2[GCAEN] is set and a general call is received.

• SMB[SIICAEN] is set and the calling address matches the second programmed slave address.

• ALERTEN is set and an SMBus alert response address is received

• RMEN is set and an address is received that is within the range between the values of the A1 and

RA registers.

IAAS sets before the ACK bit. The CPU must check the SRW bit and set TX/RX accordingly. Writing the

C1 register with any value clears this bit.

Not addressed

Addressed as a slave

I2Cx_C1 field descriptions (continued)

I2Cx_S field descriptions

I2C_D, with no need waiting for manually reading/writing the I2C data register in Rx/Tx mode.

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KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.