Functional Description - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Functional description

Setting multiple CHCFG registers with the same source value

will result in unpredictable behavior. This is true, even if a

channel is disabled (ENBL==0).

Before changing the trigger or source settings, a DMA channel

must be disabled via CHCFGn[ENBL].

Address: 4002_1000h base + 0h offset + (1d × i), where i=0d to 3d

DMA Channel Enable

Enables the DMA channel.

DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA

has separate channel enables/disables, which should be used to disable or reconfigure a DMA

DMA channel is enabled

DMA Channel Trigger Enable

Enables the periodic trigger capability for the triggered DMA channel.

Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the

specified source to the DMA channel. (Normal mode)

Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger

DMA Channel Source (Slot)

Specifies which DMA source, if any, is routed to a particular DMA channel. See the chip-specific

DMAMUX information for details about the peripherals and their slot numbers.

20.5 Functional description

The primary purpose of the DMAMUX is to provide flexibility in the system's use of the

available DMA channels.

As such, configuration of the DMAMUX is intended to be a static procedure done during

execution of the system boot code. However, if the procedure outlined in

configuring sources

during the normal operation of the system.

DMAMUXx_CHCFGn field descriptions

is followed, the configuration of the DMAMUX may be changed

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Enabling and

Freescale Semiconductor, Inc.