Reset - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Functional description

Care must be taken when expecting data from a master while

the slave is in a Wait mode or a Stop mode where the peripheral

bus clock is stopped but internal logic states are retained. Even

though the shift register continues to operate, the rest of the SPI

is shut down (that is, an SPRF interrupt is not generated until an

exit from Stop or Wait mode). Also, the data from the shift

after the slave SPI has exited Wait or Stop mode. An SPRF flag

and SPIx_DH:SPIx_DL copy is only generated if Wait mode is

entered or exited during a transmission. If the slave enters Wait

mode in idle mode and exits Wait mode in idle mode, neither an

SPRF nor a SPIx_DH:SPIx_DL copy occurs.

35.5.11.3 SPI in Stop mode

Operation in a Stop mode where the peripheral bus clock is stopped but internal logic

states are retained depends on the SPI system. The Stop mode does not depend on

C2[SPISWAI]. Upon entry to this type of stop mode, the SPI module clock is disabled

(held high or low).

• If the SPI is in master mode and exchanging data when the CPU enters the Stop

mode, the transmission is frozen until the CPU exits stop mode. After the exit from

stop mode, data to and from the external SPI is exchanged correctly.

• In slave mode, the SPI remains synchronized with the master.

The SPI is completely disabled in a stop mode where the peripheral bus clock is stopped

and internal logic states are not retained. After an exit from this type of stop mode, all

registers are reset to their default values, and the SPI module must be reinitialized.

35.5.12 Reset

The reset values of registers and signals are described in the Memory Map and Register

Descriptions content, which details the registers and their bitfields.

• If a data transmission occurs in slave mode after a reset without a write to

SPIx_DH:SPIx_DL, the transmission consists of "garbage" or the data last received

from the master before the reset.

• Reading from SPIx_DH:SPIx_DL after reset always returns zeros.

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.