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41.2.3 GPIO signal descriptions
GPIO signal descriptions
PORTA31–PORTA0
PORTB31–PORTB0
PORTC31–PORTC0
PORTD31–PORTD0
PORTE31–PORTE0
Not all pins within each port are implemented on each device.
See the chapter on signal multiplexing for the number of GPIO
ports available in the device.
41.2.3.1 Detailed signal description
Table 41-3. GPIO interface-detailed signal descriptions
Signal
PORTA31–PORTA0
PORTB31–PORTB0
PORTC31–PORTC0
PORTD31–PORTD0
PORTE31–PORTE0
Not all pins within each port are implemented on each device.
See the chapter on signal multiplexing for the number of GPIO
ports available in the device.
Freescale Semiconductor, Inc.
Table 41-2. GPIO signal descriptions
General-purpose input/output
General-purpose input/output
General-purpose input/output
General-purpose input/output
General-purpose input/output
NOTE
I/O
I/O
NOTE
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 41 General-Purpose Input/Output (GPIO)
Description
Description
General-purpose input/output
State meaning
Timing
I/O
I/O
I/O
I/O
I/O
I/O
Asserted: The pin is logic 1.
Deasserted: The pin is logic 0.
Assertion: When output, this
signal occurs on the rising-
edge of the system clock. For
input, it may occur at any time
and input may be asserted
asynchronously to the system
clock.
Deassertion: When output,
this signal occurs on the
rising-edge of the system
clock. For input, it may occur
at any time and input may be
asserted asynchronously to
the system clock.
823
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