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NXP Semiconductors
Application Note
MPC574xP Clock Calculator Guide
How to use MPC5744P tool to easily calculate device frequency domains
by:
NXP Semiconductors
1 Introduction
NXP's MPC574xP is a lockstep, dual-core 32-bit microcontroller intended for
safety and chassis applications. This application note will refer to any device
in the MPC574xP family, MPC5741P, MPC5742P, MPC5743P, and MPC5744P,
as simply "MPC5744P."
The MPC5744P supports an 8-44 MHz external oscillator (XOSC), a 16 MHz
internal RC oscillator (IRCOSC), and two phase locked loops (PLL) for a
maximum operating frequency of 200 MHz. The IRCOSC is selected out of
reset so increasing the operating frequency from 16 MHz requires additional
configuration. The MPC574xP clock calculator is meant to complement the
reference manual. It seeks to simplify the clock configuration process by
providing a graphical, interactive tool to help the user find the correct register
settings in order to achieve the desired clock frequencies.
Accompanying this application note is the clock calculator. You can download
it from MPC574xP_Clock_Calculator.
The clock calculator makes use of macros to perform functions like resetting
the spreadsheet to initial values, configuring all clock frequencies to the
maximum allowable settings, and copying generated code. Macros must be
enabled in the user's MS Excel to access these features. If macros are turned
off however, the tool will still be able to calculate clock frequencies, but the
aforementioned features will be disabled. To turn on macros in MS Excel 2016,
go to the Developer tab on the top toolbar and click on Macro Security. A popup
window will appear. In it, select Enable all macros.
Figure 1. Enabling macros
Document Number: AN5393
Contents
1 Introduction.......................................... 1
2 Clock calculator design...................... 2
2.1 Tree......................................... 3
2.2 Oscillator control..................... 6
2.3 Peripheral domains................. 6
2.4 LFAST clocking....................... 7
2.5 PLLx........................................9
pll1_phi)...................................9
2.7 Summary...............................10
2.8 Limits.....................................13
3.1 Configure ADC_CLK............. 15
oscillator.................... 16
3.1.2 Configure PLL0.......18
ADC_CLK..................23
to 40 MHz PLL.......................24
3.3 Observe the registers............25
3.4 Copy the code.......................26
4 Conclusion......................................... 27
5 Revision history................................. 27
Rev. 9, April 2018
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Related Manuals for NXP Semiconductors MPC574 P Series
Summary of Contents for NXP Semiconductors MPC574 P Series
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Page 1: Table Of Contents
NXP Semiconductors Document Number: AN5393 Application Note Rev. 9, April 2018 MPC574xP Clock Calculator Guide How to use MPC5744P tool to easily calculate device frequency domains NXP Semiconductors 1 Introduction Contents 1 Introduction.......... 1 NXP’s MPC574xP is a lockstep, dual-core 32-bit microcontroller intended for 2 Clock calculator design...... -
Page 2: Clock Calculator Design
There are also input cells that set muxes and clock dividers. All cells that take entries have blue borders instead of black, shown below. Figure 3. Input cells vs. output cells MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 3: Tree
Tree is the centerpiece of the tool. This tab is the starting point for all clock frequency calculations. It is organized to resemble the MPC5744P clock tree as presented in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... - Page 4 Clock calculator design Figure 5. MPC5744P Reference Manual clock tree The following figure shows, in part, the diagram’s clock tool counterpart. The difference between the two is that the latter is interactive. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
- Page 5 The Max button sets all blocks in this tool to values that configure the system and auxiliary clock domains to their respective maximum allowable frequencies. Below is a screenshot of the buttons. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
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Page 6: Oscillator Control
Peripheral Domains is an in-depth diagram of MPC5744P modules. Where Tree leaves off at the clock domain level, Peripheral Domains picks up and progresses to the module level, shown below. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 7: Lfast Clocking
These intricacies make it necessary to give LFAST is own dedicated tab. Peripheral Domains still hosts an LFAST block that shows its input clocks and is hyper-linked to LFAST Clocking, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... - Page 8 MHz generates an invalid signal. Therefore, in this tool, RF_REF goes through the LFAST Input Filter block before becoming lfast_sys_clk, which in turn is the signal that gets fed into the LFAST_PLL and phase generators, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
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Page 9: Pllx
The three tabs pll0_phi, pll0_phi1, and pll1_phi are reference tables for the user to find the appropriate PLL dividers and multipliers to achieve the desired PLL frequency. There is a tab for each PLL output because input frequencies and the range of acceptable MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 10: Summary
The values in the register summary are interactive, updating automatically when the associated block is changed. Registers listed within Summary are only the ones whose values are affected by clock configuration, not every single register available in the SoC. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... - Page 11 The table is organized by module, followed by the clock type (i.e. BIU clock, peripheral clock, protocol clock, etc.), and finally the frequency, as currently configured. Below is a screenshot. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
- Page 12 These functions can be copied and pasted to a source file via Ctrl+C/Ctrl+V or by clicking on the associated Copy Code button if macros are enabled. The following figure shows Sysclk‐ _Init and its Copy Code button. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
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Page 13: Limits
Limits is the reference tab for all the color-coding and code generation rules. The values in its tables are based on the MPC5744P’s datasheet and reference manual, and therefore should not be modified by the user. The following figure is a screenshot of the Limits tab. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 14: Clock Tool Example Use Case
When configuring clocks for a module, start at Peripheral Domains. As shown in the next figure, SAR ADC follows two clock domains, PBRIDGEx_CLK for the bus interface unit and ADC_CLK for the actual converter. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 15: Configure Adc_Clk
ADC_CLK. 3.1 Configure ADC_CLK Click on ADC_CLK to forward to the ADC_CLK cell of Tree, as shown in the following figure. Figure 20. ADC_CLK, Tree tab MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 16: Configure The Oscillator
Set the XOSC frequency back to 40 MHz. Set the value of the XOSC Select block to 0 to select the XTAL, the external oscillator, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... - Page 17 Figure 24. Actual XOSC frequency with source turned off Switch the XOSC Source Controller value to 1 to turn on the XOSC. The output XOSC frequency is now 40 MHz, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
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Page 18: Configure Pll0
Follow the XOSC path to AUX Clock Selector 3. Change the AUX Clock Selector 3 value to 1, so that PLL0 sources from XOSC, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... - Page 19 Configure the dividers to achieve 160 MHz. The correct configuration can be achieved by trial and error, but the MPC574xP clock calculator provides a lookup table in the pll0_phi tab, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
- Page 20 This example will target 160 MHz and change PREDIV to 2. The values and shading in the lookup table will automatically change to fit these new settings. In the figure below, the table has changed and circled are the modified settings. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
- Page 21 625 MHz. The associated voltage controlled oscillator (VCO) frequency, which can be back-calculated from PLL0_PHI also exceeds the maximum VCO spec of 1250 MHz. Therefore, the output is crosshatched and shaded red. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
- Page 22 2, Multiplier to 16, and RFDPHI to 2. As shown in the next figure, the output PLL0_PHI is 160 MHz and the cell remains unshaded, meaning the configuration fits within spec. Figure 31. PLL0_PHI configured to 160 MHz Go back to Tree to observe that the PLL0_PHI frequency is now 160 MHz. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
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Page 23: Finish Setting Adc_Clk
If, for example, the ADC_CLK divider is 1, ADC_CLK would be 160 MHz, which would exceed the maximum allowable ADC_CLK frequency of 80 MHz. The tool will highlight the ADC_CLK cell red to signify that such a frequency is not allowed, as shown in the following figure. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 24: Configure Adc Bus Clock To 40 Mhz Pll
XOSC and PLL0_PHI are already configured from the previous section, so there is no need to repeat those steps. PBRIDGEx_CLK traces back to the System Clock Selector, which currently follows XOSC. Change the System Clock Selector to follow PLL0_PHI. Figure 36. PBRIDGEx_CLK changed to follow PLL0_PHI MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 25: Observe The Registers
For example, the register MC_CGM_AC11_DC0 would not have to be included, since Auxiliary Clock 11 was untouched. Registers that would have to be written would be ones like PLLDIG_PLL0DV and MC_CGM_AC0_DC2. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 26: Copy The Code
The solid-bordered highlight around the function means that the code has been copied with the Copy Code button; a regular Ctrl+C causes a dashed-bordered highlight. In both cases, the code can be pasted into a source with a regular Ctrl+V. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... -
Page 27: Conclusion
5 Revision history Rev. No. Date Substantive Change(s) January 2017 Initial version February 2017 Updated the clock divider scheme and corrections to errors. Table continues on the next page... MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors... - Page 28 2. Removed the figure Finding tools. 3. Updated the Introduction on page 1 section. October 2017 Updated the associated MPC574xP_Clock_Calculator file. February 2018 Updated the associated MPC574xP_Clock_Calculator file. April 2018 Updated the associated MPC574xP_Clock_Calculator file. MPC574xP Clock Calculator Guide, Rev. 9, April 2018 NXP Semiconductors...
- Page 30 How To Reach Us Information in this document is provided solely to enable system and software implementers to use NXP products. There are no express or implied copyright licenses granted hereunder to Home Page: design or fabricate any integrated circuits based on the information in this document. NXP nxp.com reserves the right to make changes without further notice to any products herein.
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