Lls Mode; Vlls Modes; Initialization - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Functional description

For internal module interrupts, the WUMEx bit enables the associated module interrupt

as a wakeup source.

18.5.1 LLS mode

Wakeup events triggered from either an external pin input or an internal module interrupt,

result in a CPU interrupt flow to begin user code execution.

For any wakeup from VLLS, recovery is always via a reset flow and

RCM_SRS[WAKEUP] is set indicating the low-leakage mode was active. State retention

data is lost and I/O will be restored after PMC_REGSC[ACKISO] has been written.

A VLLS exit event due to RESET pin assertion causes an exit via a system reset. State

retention data is lost and the I/O states immediately return to their reset state. The

RCM_SRS[WAKEUP] and RCM_SRS[PIN] bits are set and the system executes a reset

flow before CPU operation begins with a reset vector fetch.

For an enabled peripheral wakeup input, the peripheral flag must be cleared by software

before entering LLS or VLLSx mode to avoid an immediate exit from the mode.

Flags associated with external input pins, filtered and unfiltered, must also be cleared by

software prior to entry to LLS or VLLSx mode.

After enabling an external pin filter or changing the source pin, wait at least five LPO

clock cycles before entering LLS or VLLSx mode to allow the filter to initialize.

After recovering from a VLLS mode, user must restore chip

configuration before clearing PMC_REGSC[ACKISO]. In

particular, pin configuration for enabled LLWU wake-up pins

must be restored to avoid any LLWU flag from being falsely set

when PMC_REGSC[ACKISO] is cleared.

The signal selected as a wake-up source pin must be a digital

pin, as selected in the pin mux control.

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.