Sticky System Reset Status Register 1 (Rcm_Ssrs1) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Field
0 Reset not caused by external reset pin
1 Reset caused by external reset pin
5 Sticky Watchdog
SWDOG
Indicates a reset has been caused by the watchdog timer timing out.This reset source can be blocked by
disabling the watchdog.
0 Reset not caused by watchdog timeout
1 Reset caused by watchdog timeout
4–3 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
2 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
1 Sticky Low-Voltage Detect Reset
SLVD
If PMC_LVDSC1[LVDRE] is set and the supply drops below the LVD trip voltage, an LVD reset occurs.
This field is also set by POR.
0 Reset not caused by LVD trip or POR
1 Reset caused by LVD trip or POR
0 Sticky Low Leakage Wakeup Reset
SWAKEUP
Indicates a reset has been caused by an enabled LLWU modulewakeup source while the chip was in a
low leakage mode. In LLS mode, the RESET pin is the only wakeup source that can cause this reset. Any
enabled wakeup source in a VLLSx mode causes a reset.
0 Reset not caused by LLWU module wakeup source
1 Reset caused by LLWU module wakeup source

22.2.8 Sticky System Reset Status Register 1 (RCM_SSRS1)

This register includes status flags to indicate all reset sources since the last POR, LVD or
VLLS Wakeup that have not been cleared by software. Software can clear the status flags
by writing a logic one to a flag.
Address: 4007_F000h base + 9h offset = 4007_F009h
Bit 7
Read 0
Write
Reset 0
Freescale Semiconductor, Inc.
RCM_SSRS0 field descriptions (continued)
6 5
0 SSACKERR
w1c
0 0
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 22 Reset Control Module (RCM)
Description
4 3
0 SMDM_AP SSW
w1c w1c
0 0
2 1
SLOCKUP
w1c
0 0
0
0
0
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