Memory Map And Register Boundary Addresses; Figure 2. Memory Map - ST STM32G0 1 Series Reference Manual

2.2.2

Memory map and register boundary addresses

0xFFFF FFFF
block 7
0 x E 0 0 0 0 0 0 0
block 6
0 x C 0 0 0 0 0 0 0
block 5
0 x A 0 0 0 0 0 0 0
block 4
0 x 8 0 0 0 0 0 0 0
block 3
0 x 6 0 0 0 0 0 0 0
block 2
0 x 4 0 0 0 0 0 0 0
block 1
0 x 2 0 0 0 0 0 0 0
block 0
0 x 0 0 0 0 0 0 0 0
1. STM32G0B1xx and STM32G0C1xx: 0x0007 FFFF; STM32G071xx and STM32G081xx: 0x0001 FFFF; STM32G051xx and
STM32G061xx, STM32G031xx and STM32G041xx: 0x0000 FFFF.
2. STM32G0B1xx and STM32G0C1xx: 0x0807 FFFF; STM32G071xx and STM32G081xx: 0x0801 FFFF; STM32G051xx and
STM32G061xx, STM32G031xx and STM32G041xx: 0x0800 FFFF.
3. Depends on boot configuration
All the memory map areas that are not allocated to on-chip memories and peripherals are
considered as reserved. For the detailed mapping of available memory and register areas,
refer to the following tables.
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Figure 2. Memory map

Arm Cortex M0+
internal peripherals
Peripherals
RAM
Code
Addressable
space
RM0444 Rev 5
Used space
Reserved space
IOPORT
AHB
APB
APB
Option bytes
Engineering bytes
OTP
System memory
Main Flash memory
Main Flash memory /
System memory /
(3)
RAM
RM0444
0 x 5 0 0 0 1FFF
0 x 5 0 0 0 0 0 0 0
0 x 4 0 0 2 63FF
0 x 4 0 0 2 0 0 0 0
0 x 4 0 0 1 5 B F F
0 x 4 0 0 1 0 0 0 0
0 x 4 0 0 0 A 7 F F
0 x 4 0 0 0 0 0 0 0
0x1FFF 787F
0 x 1 FF F 7 8 0 0
0 x 1 F F F 7 5 0 0
0 x 1 F FF 7 3 FF
0 x 1 FF F 7 0 0 0
0 x 1 FF F 0 0 0 0
( 2 )
0 x 0 8 0 0 0 0 0 0
( 1 )
0 x 0 0 0 0 0 0 0 0