Memory Map And Register Boundary Addresses; Figure 2. Memory Map - ST STM32G4 Series Reference Manual

RM0440
2.2.2

Memory map and register boundary addresses

0xFFFF FFFF
7
0xE000 0000
6
0xC000 0000
5
0xA000 0000
4
0x9000 0000
0x8000 0000
3
0x7000 0000
0x6000 0000
2
0x4000 0000
1
0x2000 0000
0
0x0000 0000

Figure 2. Memory map

Cortex®-M4
with FPU
Internal
Peripherals
Reserved
FMC and QSPI
registers
QSPI bank1
FMC bank3
Reserved
FMC bank1
Reserved
Peripherals
Reserved
CCM SRAM
SRAM2
SRAM1
CODE
Reserved
RM0440 Rev 1
0xBFFF FFFF
Reserved
0xA000 1800
QSPI registers
0xA000 1000
FMC registers
0xA000 0000
0x5FFF FFFF
Reserved
0x5006 0C00
AHB2
0x4800 0000
Reserved
0x4002 4400
AHB1
0x4002 0000
Reserved
0x4001 6400
APB2
0x4001 0000
Reserved
0x4000 9800
APB1
0x4000 0000
0x1FFF FFFF
Reserved
0x1FFF F810
Option Bytes
0x1FFF F800
Reserved
0x1FFF F000
System memory
0x1FFF 8000
Reserved
0x1FFF 7810
Options Bytes
0x1FFF 7800
Reserved
0x1FFF 7400
OTP area
0x1FFF 7000
System memory
0x1FFF 0000
Reserved
0x1000 8000
CCM SRAM
0x1000 0000
Reserved
0x0808 0000
Flash memory
0x0800 0000
Reserved
0x0008 0000
Flash, system memory
or SRAM, depending on
BOOT configuration
0x0000 0000
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