Software Reset Control 0 (Srcr0) Register; Software Reset Control 0 (Srcr0) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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System Control Registers

Table 1-62. C28 Reset Cause Register (CRESC) Register Field Descriptions (continued)

1.13.3.5 Software Reset Control 0 (SRCR0) Register

NOTE: Writes to this register are masked by the DC1 register.

Putting the module into reset and bringing it out of reset is done by software. When a

particular bit is set, the module goes into reset and to bring the module out of reset, software

has to again write a '0' explicitly to the register.

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 1-63. Software Reset Control 0 (SRCR0) Register Field Descriptions

System Control and Interrupts

POR reset. If set, indicates that a power-on reset caused a device reset.

If '0' then POR reset fired indicating a POR condition.

Clears this bit

External Reset Input.

A '1' indicates that an external reset input pin caused a device reset. If '0' then there was no

external reset input since the previous POR.

Clears this bit

Figure 1-52. Software Reset Control 0 (SRCR0) Register

WDT1 S/W Reset Control

When this bit is set, Watchdog Timer module 1 is reset. All internal data is lost and the registers are

returned to their reset states. This bit must be manually cleared after being set.

WDT0 S/W Reset Control

When this bit is set, Watchdog Timer module 0 is reset. All internal data is lost and the registers are

returned to their reset states. This bit must be manually cleared after being set.

SPRUH22I – April 2012 – Revised November 2019

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