Missing Clock Status (Mclksts) Register; Missing Clock Force (Mclkfrcclr) Register; M3 Configuration Lock (Mlock) Register Field Descriptions; Missing Clock Status (Mclksts) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Table 1-97. M3 Configuration Lock (MLOCK) Register Field Descriptions

1.13.6.3 Missing Clock Status (MCLKSTS) Register

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 1-98. Missing Clock Status (MCLKSTS) Register Field Descriptions

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

SPRUH22I – April 2012 – Revised November 2019

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Lock Writes to MSxMSEL Register

This is a write once only register bit. It prevents further writes to the MSxMSEL register and

overrides any other protection mechanism.

Reading the bit gives the lock state.Lock mechanism can only be cleared by shared resource reset.

Lock the register

Figure 1-87. Missing Clock Status (MCLKSTS) Register

Missing Clock Status Flag

Clock missing condition detection status flag bit.

Reference clock is not missing, clock source is X1

Reference clock is missing, clock source is internal oscillator

Reference Clock Count

Read only value of the reference clock counter.

Note: This is a free-running counter that continues to run even after clock glitches causing a

missing clock condition.

Figure 1-88. Missing Clock Force (MCLKFRCCLR) Register

System Control Registers

System Control and Interrupts

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