M3 Subsystem Low-Power Modes - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Table 1-25 summarizes the low-power modes on the M3 subsystem.
Mode Enter Using
(1)
SLEEP Sleep Now
WFE / WFI
instructions
Sleep on Exit
Set Sleep-on-exit bit
Cortex M3
SYSCTRL register
+WFE/WFI
DEEP Set SLEEPDEEP bit
(1) (2)
SLEEP
Cortex M3
SYSCTRL register
+ Sleep now or
Sleep-on-exit
(1)
The low-power mode clock gating scheme will suppress the debug accesses in sleep and deep sleep mode.
(2)
If the user exits deep-sleep mode, the user must not re-enter this mode within 5us otherwise the PLL timing may get affected.
(3)
Turning OSC off in deep-sleep mode is not supported.
The SLEEPDEEP bit of the System Control (SYSCTRL) register selects which sleep mode is used. Refer
to the SYSCTRL register description in the Cortex-M3 Peripherals chapter for more details.
1.9.1.1.1 Entering Low-Power Mode
This section describes the mechanisms for entering low-power mode and the conditions for waking up
from low-power mode, both of which apply to sleep mode and deep-sleep mode.
The only distinguishing factor between selecting sleep or deep sleep as the system's low-power mode is
the SLEEPDEEP bit of the M3 System Control (SYSCTRL) register. The value of this bit indicates the low-
power mode selection for the system.
SLEEPDEEP Value
0
1
All the mechanisms below can be used to enter either sleep or deep sleep mode.
1.9.1.1.1.1 WAIT For INTERRUPT
The wait for interrupt instruction, WFI, causes immediate entry to sleep mode unless the wake-up
condition is true (see
executing instructions and enters sleep mode. See the Cortex™-M3 Instruction Set Technical User's
Manual for more information.
SPRUH22I – April 2012 – Revised November 2019
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Table 1-25. M3 Subsystem Low-Power Modes
Oscillator clock
on
on
of
On but lower
(3)
of frequency
(Refer to the
DSLPCLKCFG
register)
Section 1.9.1.1.1.5). When the processor executes a WFI instruction, it stops
Copyright © 2012–2019, Texas Instruments Incorporated
PLL X1, X2 FCLK to M3
(can be
turned off /
on
depending
on
SYSCLKCT
L register)
on on
on on
off On
Description
Use sleep mode as the low power mode
Use deep-sleep mode as the low power mode
Low Power Modes
HCLK to M3 Exit
CPU CPU
on off Any event
for WFE /
Any interrupt
for WFI
on off Any event
for WFE /
Any interrupt
for WFI
on off Any event
for WFE /
Any interrupt
for WFI
System Control and Interrupts
141