Peripheral Clock Control Register 2 (Pclkcr2); Peripheral Clock Control Register 2 (Pclkcr2) Register Field Descriptions - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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System Control Registers
Table 1-131. Peripheral Clock Control Register 1 (PCLKCR1) Register Field Descriptions (continued)
Bit
Field
7-0
EPWMxENCLK
(n = 8-1)

1.13.7.29 Peripheral Clock Control Register 2 (PCLKCR2)

15
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-132. Peripheral Clock Control Register 2 (PCLKCR2) Register Field Descriptions
Bit
Field
15-9
Reserved
8
EQEP3ENCLK
7-1
Reserved
0
EPWM9ENCLK
244
System Control and Interrupts
Value
Description
ePWM8-1 Clock Enables
When set, this enables the clock to the respective ePWM module.
0
Clock is disabled
1
Clock is enabled
Figure 1-121. Peripheral Clock Control Register 2 (PCLKCR2)
Reserved
R-0:0
Reserved
R-0
Value
Description
Reserved
eQEP3 Clock Enable
When set, this enables the clock to the eQEP3 module.
0
eQEP3 clock is disabled
1
eQEP3 clock is enabled
Reserved
ePWM9 Clock Enable
When set, this enables the clock to the ePWM9 module.
0
ePWM9 clock is disabled
1
ePWM9 clock is enabled
Copyright © 2012–2019, Texas Instruments Incorporated
9
1
SPRUH22I – April 2012 – Revised November 2019
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8
EQEP3ENCLK
R/W-0
0
EPWM9ENCLK
R/W-0

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