Software Reset Control 3 (Srcr3) Register - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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Table 1-65. Software Reset Control 2 (SRCR2) Register Field Descriptions (continued)
Bit Field
16 USB
15-14 Reserved
13 µDMA
12-9 Reserved
8 GPIOJ
7 GPIOH
6 GPIOG
5 GPIOF
4 GPIOE
3 GPIOD
2 GPIOC
1 GPIOB
0 GPIOA

1.13.3.8 Software Reset Control 3 (SRCR3) Register

NOTE: Writes to this register are masked by the DC10 register.
Putting the module into reset and bringing it out of reset is done by software. When a
particular bit is set, the module goes into reset and to bring the module out of reset, software
has to again write a '0' explicitly to the register.
31
Reserved
R-0:0
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
SPRUH22I – April 2012 – Revised November 2019
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Value Description
USB S/W Reset Control
When this bit is set, USB is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
Reserved
µDMA S/W Reset Control
When this bit is set, µDMA is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
Reserved
GPIOJ SW Reset Control
When this bit is set, GPIOJ is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOH SW Reset Control
When this bit is set, GPIOH is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOG SW Reset Control
When this bit is set, GPIOG is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOF SW Reset Control
When this bit is set, GPIOF is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOE SW Reset Control
When this bit is set, GPIOE is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOF SW Reset Control
When this bit is set, GPIOD is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOC SW Reset Control
When this bit is set, GPIOC is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOB SW Reset Control
When this bit is set, GPIOB is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
GPIOA SW Reset Control
When this bit is set, GPIOA is reset. All internal data is lost and the registers are returned to their
reset states. This bit must be manually cleared after being set.
Figure 1-55. Software Reset Control 3 (SRCR3) Register
26 25
CAN1
R/W-0 R/W-0
Reserved
R-0:0
Copyright © 2012–2019, Texas Instruments Incorporated
24 23
CAN0
System Control Registers
Reserved
R-0:0
1 0
UART4
R-0
System Control and Interrupts
16
195