Crc Polynomials; Crc Calculation Procedure; Crc Calculation For Data Stored In Secure Memory; Inter Processor Communications (Ipc) - Texas Instruments Concerto F28M35 Series Technical Reference Manual

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µCRC Module

1.11.2 CRC Polynomials

The following are the CRC polynomials supported by the µCRC module:
CRC8 Polynomial = 0x07
CRC16 Polynomial-1 = 0x8005
CRC16 Polynomial-2 = 0x1021
CRC32 Polynomial = 0x04C11DB7

1.11.3 CRC Calculation Procedure

The following is the software procedure to calculate CRC for a set of data stored in M3 addressable
memory space:
Save the current value of the CRC result register (uCRCRES) into the stack to allow calculation of
CRC in nested interrupt.
Clear the CRC result register (uCRCRES) by setting the CLEAR field of the uCRCCONTROL register
to '1'.
Configure uCRC polynomials (CRC8, CRC16-P1, CRC16-P2 or CRC32) in the uCRCCONFIG register.
Read the data from memory locations for which CRC needs to be calculated using mirrored address.
Read the µCRCRES register to get the calculated CRC value. Pop the last save value of the CRC from
stack and store it into the CRC result register (uCRCRES).

1.11.4 CRC Calculation For Data Stored In Secure Memory

This device has dual zone security for the M3 subsystem (refer to
zoneX (X -> 1/2) software does not have access to data/program data in zoneY (Y -> 2/1), code running
from zoneX cannot calculate CRC on data stored in zoneY memory.
Similarly, in case of Exe-Only flash sectors, even though software is running from same secure zone, it
cannot read the data stored in Exe-Only sectors. Hardware does allow CRC computation on data stored in
Exe-Only flash sectors as long as the read access for this data is initiated by code running from same
secure zone. These reads are just dummy reads, and in this case, read data only goes to the µCRC
module, not to the CPU.

1.12 Inter Processor Communications (IPC)

The Inter Processor Communications (IPC) module facilitates communication between the master and
control subsystems. This section details the IPC mechanisms that the master (M3) subsystem and control
(C28x) subsystem can use to request/share information between the two subsystems and notify the status
of any dependent tasks between the two subsystems.
This module consists of six main features:
MSGRAMs
IPC Flags and Interrupts
IPC Message Registers
Flash Pump Semaphore
Clock Configuration Semaphore
Free running counter
Along with the above features, the IPC module has some boot registers that are used by boot ROM code
for identifying boot modes and boot statuses. Refer to the Boot ROM chapter for more information on
these IPC boot registers.
156
System Control and Interrupts
Copyright © 2012–2019, Texas Instruments Incorporated
Section 1.10
for more details). Since
SPRUH22I – April 2012 – Revised November 2019
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