Chapter 35 Comparator (Cmp); Chip-Specific Cmp Information - NXP Semiconductors freescale KV4 Series Reference Manual

Chapter 35
Comparator (CMP)
35.1

Chip-specific CMP information

35.1.1 CMP Signal Assignments
For more details see SIM_MISCTRL and SIM_SOPT7
registers
Instance Signal
CMP0
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
WindowIN
CMP0_OUT
CMP1 IN0
Freescale Semiconductor, Inc.
NOTE
Table 35-1. CMP Signal assignments
Description I/O
input channel input
input channel input
input channel input
input channel input
input channel input
input channel input
input channel input
input channel input
— input
— output
input channel input
Table continues on the next page...
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Connected to Ext Pin Mux / SIM
CMP0_IN0 pin PTC6
CMP0_IN1 pin PTC7
CMP0_IN2 pin PTC8
CMP0_IN3 pin PTC9
CMP0_IN4 pin
CMP0_IN5 pin PTE29
bandgap
6bDAC
PDB0 pulse out,
PDB1 pulse out
XBARA_OUT16
LPTMR0, PDB0 ch SIM:
0001, PDB1_ch FTM0TRG0SRC,
0001, DMA_MUX FTM1TRG0SRC,
source FTM3TRIG0SRC,
42,XBARA_IN12,X FTM1CH0SRC,
BARB1_IN0 FTM0FLT0,
FTM1FLT0,
FTM3FLT0,
UART0RXSRC,
UART1RXSRC
CMP1_IN0 pin PTC2
Pin No. Of
100
pin78 of 100
pin79 of 100
pin80 of 100
pin81 of 100
— pin28 of 100
pin26 of 100
— —
— —
— —
PTB20 , PTC5,
PTA1 via digital
signal mux
pin72 of 100
723