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NXP Semiconductors
10. Random number generator
The integrated RNG consists of two main parts: an analog True Random Number
Generator (TRNG) connected to a digital Pseudo Random Number Generator (PRNG).
The analog TRNG is used to load a new seed into the PRNG.
10.1 RNG features
• Combination of an analog TRNG and a digital PRNG
• 80-bit LFSR + Substitution-Box
• Dedicated clock for TRNG, PRNG runs on system clock.
• Data Ready Indicator bit
• Compliant to BSI AIS20 and SP800-22 (includes FIPS 140-2) RNG tests
• Connected to the CPU via an APB 3.0 bus
10.2 Functional description
The RNG module generates random numbers continuously at HFO speed. The RNG
module can be stopped for lower consumption by disabling the HFO clock in the PCR or
resetting the RNG_CONTROL_REG.rng_enable bit.
Main blocks (shown in
• RNG digital core (PRNG)
• RNG analog core (TRNG)
• APB Slave Interface and Register Bank
UM10858
User manual
COMPANY PUBLIC
Fig
24):
All information provided in this document is subject to legal disclaimers.
Rev. 1.4 — 14 May 2018
314514
UM10858
PN7462 family HW user manual
© NXP B.V. 2018. All rights reserved.
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