Espressif ESP32 Technical Reference Manual page 95

5 DPort Registers
5.3.6 APP_CPU Controller Registers
APP_CPU controller registers are used for some basic configuration of the APP_CPU, such as performing a
stalling execution, and for configuring the ROM boot jump address. The registers are listed in Section 5.4,
categorized as "APP_CPU controller registers". A detailed description of these registers is provided in section
5.5. Note that reset bits are not self-clearing.
5.3.7 Peripheral Clock Gating and Reset
The following registers are used for controlling the clock gating and reset of different peripherals. A detailed
description of these registers is provided in section 5.5.
•
DPORT_PERI_CLK_EN_REG
•
DPORT_PERI_RST_EN_REG
•
DPORT_PERIP_CLK_EN_REG
•
DPORT_PERIP_RST_EN_REG
•
DPORT_WIFI_CLK_EN_REG
•
DPORT_WIFI_RST_EN_REG
Notice:
• Clock gating and reset registers are active high.
• Reset registers cannot be cleared by hardware. Therefore, SW reset clear is required after setting the reset
registers.
• ESP32 features low power consumption. This is why some peripheral clocks are gated (disabled) by
default. Before using any of these peripherals, it is mandatory to enable the clock for the given periph-
eral by setting the corresponding CLK_EN bit to 1, and release the peripheral from reset state to make it
operational by setting the RST_EN bit to 0.
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ESP32 TRM (Version 5.2)