Espressif ESP32 Technical Reference Manual page 727

31 Low-Power Management (RTC_CNTL)
Register 31.31. RTC_CNTL_WDTCONFIGn_REG (n: 1-4) (0x008C+4*n)
31
RTC_CNTL_WDTCONFIGn_REG Hold cycles for WDT stage n. (R/W)
31 30
0 0 0 0 0 0 0
RTC_CNTL_WDT_FEED SW feeds WDT. (WO)
31
RTC_CNTL_WDTWPROTECT_REG If the register contains a different value than 0x50d83aa1, write
protection for the RTC watchdog (RWDT) is enabled. (R/W)
Espressif Systems
0x000000FFF
Register 31.32. RTC_CNTL_WDTFEED_REG (0x00A0)
0 0 0 0 0 0 0 0
Register 31.33. RTC_CNTL_WDTWPROTECT_REG (0x00A4)
0x050D83AA1
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0 0 0 0 0 0 0 0
727
0 0 0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
Reset
0
0
Reset
0
Reset