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Espressif ESP32 Technical Reference Manual page 94

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5 DPort Registers
5 DPort Registers
5.1 Introduction
The ESP32 integrates a large number of peripherals, and enables the control of individual peripherals to achieve
optimal characteristics in performance-vs-power-consumption scenarios. The DPort registers control clock
management (clock gating), power management, and the configuration of peripherals and core-system mod-
ules. The system arranges each module with configuration registers contained in the DPort Register.
5.2 Features
DPort registers correspond to different peripheral blocks and core modules:
• System and memory
• Reset and clock
• Interrupt matrix
• DMA
• MPU/MMU
• APP_CPU controller
• Peripheral clock gating and reset
5.3 Functional Description
5.3.1 System and Memory Register
System and memory registers are used for system and memory configuration, such as cache configuration
and memory remapping. They are listed in Section 5.4, categorized as "System and memory registers". For a
detailed description of these registers, please refer to Chapter
5.3.2 Reset and Clock Registers
Reset and clock registers are listed in Section 5.4, categorized as "Reset and clock registers". For a detailed
description of these registers, please refer to Chapter
5.3.3 Interrupt Matrix Register
The interrupt matrix registers are used for configuring and mapping interrupts through the interrupt matrix. They
are listed in Section 5.4, categorized as "Interrupt matrix registers". For a detailed description of these registers,
please refer to Chapter
Interrupt Matrix
5.3.4 DMA Registers
DMA registers are used for the SPI DMA configuration. They are listed in Section 5.4, categorized as "DMA
registers". For a detailed description of these registers, please refer to Chapter
5.3.5 MPU/MMU Registers
MPU/MMU registers are used for MPU/MMU configuration and operation control. They are listed in Section
5.4, categorized as "MPU/MMU registers". For a detailed description of these registers, please refer to Chapter
Memory Management and Protection Units (MMU,
Espressif Systems
System and
Reset and
(INTERRUPT).
MPU).
94
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Memory.
Clock.
DMA Controller
ESP32 TRM (Version 5.2)
(DMA).

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