Espressif ESP32 Technical Reference Manual page 312

11 I2C Controller (I2C)
31
0 0 0 0 0 0 0
I2C_SCL_FILTER_EN This is the filter enable bit for SCL. (R/W)
I2C_SCL_FILTER_THRES When a pulse on the SCL input has smaller width than this register value
in APB clock cycles, the I2C controller will ignore that pulse. (R/W)
31
0 0 0 0 0 0 0
I2C_SDA_FILTER_EN This is the filter enable bit for SDA. (R/W)
I2C_SDA_FILTER_THRES When a pulse on the SDA input has smaller width than this register value
in APB clock cycles, the I2C controller will ignore that pulse. (R/W)
31 30
0 0 0 0 0 0 0
I2C_COMMANDn_DONE When command
level. (R/W)
I2C_COMMANDn
op_code is the command, 0: RSTART; 1: WRITE; 2: READ; 3: STOP; 4: END.
Byte_num represents the number of bytes that need to be sent or received.
ack_check_en, ack_exp and ack are used to control the ACK bit. See
more information.
Espressif Systems
Register 11.19. I2C_SCL_FILTER_CFG_REG (0x0050)
0 0 0 0 0 0 0 0
Register 11.20. I2C_SDA_FILTER_CFG_REG (0x0054)
0 0 0 0 0 0 0 0
Register 11.21. I2C_COMDn_REG (n: 0-15) (0x58+4*n)
0 0 0 0 0 0 0 0
This is the content of command n. It consists of three parts: (R/W)
Submit Documentation Feedback
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
14 13
0 0 0 0 0 0 0 0
n is done in I2C Master mode, this bit changes to high
312
4 3 2
0 0 0 0 0 1 0 0
4 3 2
0 0 0 0 0 1 0 0
0 0 0 0 0 0 0 0
I2C cmd structure
ESP32 TRM (Version 5.2)
0
0 Reset
0
0
Reset
0
0
Reset
for