Espressif ESP32 Technical Reference Manual page 250

10 Ethernet Media Access Controller (MAC)
• Read, Write, and Self Update (R/W/SU)
• Latched-low (LL)
• Latched-high (LH)
Name
DMA configuration and control registers
DMABUSMODE_REG
DMATXPOLLDEMAND_REG
DMARXPOLLDEMAND_REG
DMARXBASEADDR_REG
DMATXBASEADDR_REG
DMASTATUS_REG
DMAOPERATION_MODE_REG
DMAIN_EN_REG
DMAMISSEDFR_REG
DMARINTWDTIMER_REG
DMATXCURRDESC_REG
DMARXCURRDESC_REG
DMATXCURRADDR_BUF_REG
DMARXCURRADDR_BUF_REG
MAC configuration and control registers
EMACCONFIG_REG
EMACFF_REG
EMACGMIIADDR_REG
EMACMIIDATA_REG
EMACFC_REG
EMACDEBUG_REG
PMT_RWUFFR_REG
PMT_CSR_REG
EMACLPI_CSR_REG
EMACLPITIMERSCONTROL_REG
EMACINTS_REG
EMACINTMASK_REG
EMACADDR0HIGH_REG
EMACADDR0LOW_REG
Espressif Systems
Description
Bus mode configuration
Pull demand for data transmit
Pull demand for data receive
Base address of the first receive de-
scriptor
Base address of the first transmit de-
scriptor
State of interrupts, errors and other
events
Receive and Transmit operating modes
and command
Enable / disable interrupts
Missed Frame and Buffer Overflow
Counter Register
Watchdog timer count on receive
Pointer to current transmit descriptor
Pointer to current receive descriptor
Pointer to current transmit buffer
Pointer to current receive buffer
MAC configuration
Frame filter settings
PHY configuration access
PHY data read write
frame flow control
Status debugging bits
Remote Wake-Up Frame Filter
PMT Control and Status
LPI Control and Status
LPI Timers Control
Interrupt status
Interrupt mask
Upper 16 bits of the first 6-byte MAC ad-
dress
Lower 32 bits of the first 6-byte MAC
address
250
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Address Access
0x3FF69000 R/WS/SC
0x3FF69004 RO/WT
0x3FF69008 RO/WT
0x3FF6900C R/W
0x3FF69010 R/W
0x3FF69014 R/SS/WC
0x3FF69018 R/SS/WC
0x3FF6901C R/W
0x3FF69020 R/W
0x3FF69024 R/W
0x3FF69048 RO
0x3FF6904C RO
0x3FF69050 RO
0x3FF69054 RO
0x3FF6A000 R/W
0x3FF6A004 R/W
0x3FF6A010 R/WS/SC
0x3FF6A014 R/W
R/WS/SC(FCB)
0x3FF6A018
R/W(BPA)
0x3FF6A024 RO
0x3FF6A028 RO
0x3FF6A02C RO
0x3FF6A030 RO
0x3FF6A034 RO
0x3FF6A038 RO
0x3FF6A03C R/W
0x3FF6A040 R/W
0x3FF6A044 R/W
ESP32 TRM (Version 5.2)