Espressif ESP32 Technical Reference Manual page 538

20 eFuse Controller
31
0 0 0 0 0 0 0
EFUSE_BLK0_WDATA1_REG This field programs the value of lower 32 bits of WIFI_MAC_Address.
(R/W)
31
0 0 0 0 0 0 0
EFUSE_WIFI_MAC_CRC_HIGH This
WIFI_MAC_Address. (R/W)
31
0 0 0 0 0 0 0 0
EFUSE_CHIP_VER_PKG These are the first three bits among the four bits to program chip packaging
version. (R/W)
EFUSE_SPI_PAD_CONFIG_HD This field programs the value of SPI_pad_config_hd. (R/W)
EFUSE_CHIP_VER_DIS_CACHE This field is programmed to disable cache. (R/W)
EFUSE_CHIP_VER_PKG This is the fourth bit among the four bits to program chip packaging version.
(R/W)
EFUSE_CHIP_VER_DIS_BT This field is programmed to disable Bluetooth. (R/W)
EFUSE_CHIP_VER_DIS_APP_CPU This field is programmed to disable APP CPU. (R/W)
Espressif Systems
Register 20.9. EFUSE_BLK0_WDATA1_REG (0x020)
0 0 0 0 0 0 0 0
Register 20.10. EFUSE_BLK0_WDATA2_REG (0x024)
24 23
0 0 0 0 0 0 0 0
field
Register 20.11. EFUSE_BLK0_WDATA3_REG (0x028)
0 0 0 0 0 0 0 0 0 0
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0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
programs the value
12 11 9
0 0 0 0 0 0 0 0
538
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
of higher 24 bits
8 4 3 2 1
0 0 0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
0
Reset
0
0
Reset
of
0
0
Reset