Espressif ESP32 Technical Reference Manual page 667

30 ULP Coprocessor (ULP)
30.4.1 ALU - Perform Arithmetic/Logic Operations
The ALU (Arithmetic and Logic Unit) performs arithmetic and logic operations on values stored in ULP
coprocessor registers, and on immediate values stored in the instruction itself.
The following operations are supported:
• Arithmetic: ADD and SUB
• Logic: bitwise logical AND and bitwise logical OR
• Bit shifting: LSH and RSH
• Moving data to register: MOVE
• Stage count register manipulation: STAGE_RST, STAGE_INC and STAGE_DEC
The ALU instruction, which has one OpCode, can perform various different arithmetic and logic operations,
depending on the setting of the instruction's bits [27:21] accordingly.
30.4.1.1 Operations Among Registers
31 28 27
4'd7 3'b0
Figure 30-3. Instruction Type — ALU for Operations Among Registers
When bits [27:25] of the instruction in Figure
coprocessor register R[0-3]. The types of operations depend on the setting of the instruction's bits [24:21]
presented in Table 30-1.
Operand Description - see Figure
ALU_sel Type of ALU operation
Rdst Register R[0-3], destination
Rsrc1 Register R[0-3], source
Rsrc2 Register R[0-3], source
ALU_sel Instruction
0 ADD
1 SUB
2 AND
3 OR
4 MOVE
5 LSH
6 RSH
Note:
• ADD/SUB operations can be used to set/clear the overflow flag in ALU.
• All ALU operations can be used to set/clear the zero flag in ALU.
Espressif Systems
25 24 21
ALU_sel
30-3
30-3
Operation
Rdst = Rsrc1 + Rsrc2
Rdst = Rsrc1 - Rsrc2
Rdst = Rsrc1 & Rsrc2
Rdst = Rsrc1 | Rsrc2
Rdst = Rsrc1
Rdst = Rsrc1 << Rsrc2
Rdst = Rsrc1 >> Rsrc2
Table 30-1. ALU Operations Among Registers
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are set to 3'b0, ALU performs operations, using the ULP
Description
Add to register
Subtract from register
Bitwise logical AND of two operands
Bitwise logical OR of two operands
Move to register
Bit shifting Left
Bit shifting Right
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5 4 3 2 1 0
Rsrc2 Rsrc1 Rdst
ESP32 TRM (Version 5.2)