Espressif ESP32 Technical Reference Manual page 271

10 Ethernet Media Access Controller (MAC)
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FCBBA This bit initiates a Pause frame in the full-duplex mode and activates the backpressure func-
tion in the half-duplex mode if the TFCE bit is set. In the full-duplex mode, this bit should be
read as 1'b0 before writing to the Flow Control register. To initiate a Pause frame, the Application
must set this bit to 1'b1. During a transfer of the Control Frame, this bit continues to be set to
signify that a frame transmission is in progress. After the completion of Pause frame transmis-
sion, the MAC resets this bit to 1'b0. The Flow Control register should not be written to until this
bit is cleared. In the half-duplex mode, when this bit is set (and TFCE is set), then backpressure
is asserted by the MAC. During backpressure, when the MAC receives a new frame, the trans-
mitter starts sending a JAM pattern resulting in a collision. When the MAC is configured for the
full-duplex mode, the BPA is automatically disabled. (R/WS/SC)(FCB)/(R/W)(BPA(backpressure
activate))
Espressif Systems
Register 10.19. EMACFC_REG (0x1018)
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ESP32 TRM (Version 5.2)