Espressif ESP32 Technical Reference Manual page 154

7 SPI Controller (SPI)
31
0 0 0 0 0 0 0
SPI_OUT_TOTAL_EOF_INT_ENA The interrupt enable bit for the
(R/W)
SPI_OUT_EOF_INT_ENA The interrupt enable bit for the
SPI_OUT_DONE_INT_ENA The interrupt enable bit for the
SPI_IN_SUC_EOF_INT_ENA The interrupt enable bit for the
SPI_IN_ERR_EOF_INT_ENA The interrupt enable bit for the
SPI_IN_DONE_INT_ENA The interrupt enable bit for the
SPI_INLINK_DSCR_ERROR_INT_ENA The
SPI_INLINK_DSCR_ERROR_INT
SPI_OUTLINK_DSCR_ERROR_INT_ENA The
SPI_OUTLINK_DSCR_ERROR_INT
SPI_INLINK_DSCR_EMPTY_INT_ENA The
SPI_INLINK_DSCR_EMPTY_INT
Espressif Systems
Register 7.29. SPI_DMA_INT_ENA_REG (0x110)
0 0 0 0 0 0 0 0
interrupt. (R/W)
interrupt. (R/W)
interrupt. (R/W)
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9 8
0 0 0 0 0 0 0 0 0
SPI_OUT_TOTAL_EOF_INT
SPI_OUT_EOF_INT
SPI_OUT_DONE_INT
SPI_IN_SUC_EOF_INT
SPI_IN_ERR_EOF_INT
SPI_IN_DONE_INT
interrupt enable
interrupt enable
interrupt enable
154
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 Reset
interrupt.
interrupt. (R/W)
interrupt. (R/W)
interrupt. (R/W)
interrupt. (R/W)
interrupt. (R/W)
bit for the
bit for the
bit for the
ESP32 TRM (Version 5.2)