Espressif ESP32 Technical Reference Manual page 178

8 SDIO Slave Controller
31
0 0 0 0 0 0 0
SLC_SLC0_TOKEN_NO_REPLACE Please initialize to 1. Do not modify it. (R/W)
31 29 28
0x0 0 0 0 0
SLC0_LEN_INC_MORE Set this bit to add the value of SLC0_LEN to that of SLC0_LEN_WDATA.
(WO)
SLC0_LEN_WDATA The packet length sent. (WO)
31
0x0000
SLC0_LEN Indicates the packet length sent by the Slave. (RO)
8.6 SLC Host Registers
The addresses in parenthesis besides register names are the register addresses relative to the SDIO Slave
base address (0x3FF5_5000) provided in Table
Memory. The absolute register addresses are listed in Section
Espressif Systems
Register 8.11. SLC_RX_DSCR_CONF_REG (0x98)
0 0 0 0 0 0 0 0
Register 8.12. SLC0_LEN_CONF_REG (0xE4)
23 22 21 20 19
0 0 0 0 0
Register 8.13. SLC0_LENGTH_REG (0xE8)
20 19
1-6
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0 0 0 0 0 0 0 0
0x000000
0x000000
Peripheral Address Mapping in Chapter
8.4 Register
178
1
0 0 0 0 0 0 0 0
1 System and
Summary.
ESP32 TRM (Version 5.2)
0
0 Reset
0
Reset
0
Reset