17 Pulse Count Controller (PCNT)
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PCNT_THR_THRES0_EN_Un
PCNT_THR_L_LIM_EN_Un
PCNT_THR_H_LIM_EN_Un
PCNT_THR_ZERO_EN_Un
PCNT_FILTER_EN_Un
PCNT_FILTER_THRES_Un
pulses lasting shorter than this will be ignored when the filter is enabled. (R/W)
31
PCNT_CNT_THRES1_Un
PCNT_CNT_THRES0_Un
31
PCNT_CNT_L_LIM_Un
PCNT_CNT_H_LIM_Un
Espressif Systems
Register 17.1. PCNT_Un_CONF0_REG (n: 0-7) (0x0+0x0C*n)
This is the enable bit for unit n's thres0 comparator. (R/W)
This is the enable bit for unit n's thr_l_lim comparator. (R/W)
This is the enable bit for unit n's thr_h_lim comparator. (R/W)
This is the enable bit for unit n's zero comparator. (R/W)
This is the enable bit for unit n's input filter. (R/W)
This sets the maximum threshold, in APB_CLK cycles, for the filter. Any
Register 17.2. PCNT_Un_CONF1_REG (n: 0-7) (0x4+0x0C*n)
0x000
This register is used to configure the thres1 value for unit n. (R/W)
This register is used to configure the thres0 value for unit n. (R/W)
Register 17.3. PCNT_Un_CONF2_REG (n: 0-7) (0x8+0x0C*n)
0x000
This register is used to configure the thr_l_lim value for unit n. (R/W)
This register is used to configure the thr_h_lim value for unit n. (R/W)
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16
15
16
15
507
0x000
0x000
ESP32 TRM (Version 5.2)
0
Reset
0
Reset
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