3 Reset and Clock
31
0
0
0
0
0
0
0
SYSCON_PLL_TICK_NUM Configures the divider value of REF_TICK when the source of APB_CLK
is PLL_CLK. The value range is 0x0 ~ 0xFF. REF_TICK = APB_CLK /(the value of this field + 1).
(R/W)
31
0
0
0
0
0
0
0
SYSCON_CK8M_TICK_NUM Configures the divider value of REF_TICK when the source of APB_CLK
is FOSC_CLK. The value range is 0x0 ~ 0xFF. REF_TICK = APB_CLK /(the value of this field + 1).
(R/W)
31
0
0
0
0
0
0
0
SYSCON_APLL_TICK_NUM Configures the divider value of REF_TICK when the source of APB_CLK
is APLL_CLK. The value range is 0x0 ~ 0xFF. REF_TICK = APB_CLK /(the value of this field + 1).
(R/W)
Espressif Systems
Register 3.3. SYSCON_PLL_TICK_CONF_REG (0x0008)
0
0
0
0
0
0
0
0
Register 3.4. SYSCON_CK8M_TICK_CONF_REG (0x000C)
0
0
0
0
0
0
0
0
Register 3.5. SYSCON_APLL_TICK_CONF_REG (0x003C)
0
0
0
0
0
0
0
0
Submit Documentation Feedback
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
47
8
7
0
79
8
7
0
11
8
7
0
99
ESP32 TRM (Version 5.2)
0
Reset
0
Reset
0
Reset
Need help?
Do you have a question about the ESP32 and is the answer not in the manual?