Espressif ESP32 Technical Reference Manual page 158

7 SPI Controller (SPI)
31
0 0 0 0 0 0 0
SPI_INLINK_DSCR_REG The address of the current inlink descriptor. (RO)
31
0 0 0 0 0 0 0
SPI_INLINK_DSCR_BF0_REG The address of the next inlink descriptor. (RO)
31
0 0 0 0 0 0 0
SPI_INLINK_DSCR_BF1_REG The address of the next inlink data buffer. (RO)
31
0 0 0 0 0 0 0
SPI_OUT_EOF_BFR_DES_ADDR_REG The buffer address corresponding to the outlink descriptor
that produces EOF. (RO)
31
0 0 0 0 0 0 0
SPI_OUT_EOF_DES_ADDR_REG The last outlink descriptor address when SPI DMA encountered
EOF. (RO)
Espressif Systems
Register 7.35. SPI_INLINK_DSCR_REG (0x128)
0 0 0 0 0 0 0 0
Register 7.36. SPI_INLINK_DSCR_BF0_REG (0x12C)
0 0 0 0 0 0 0 0
Register 7.37. SPI_INLINK_DSCR_BF1_REG (0x130)
0 0 0 0 0 0 0 0
Register 7.38. SPI_OUT_EOF_BFR_DES_ADDR_REG (0x134)
0 0 0 0 0 0 0 0
Register 7.39. SPI_OUT_EOF_DES_ADDR_REG (0x138)
0 0 0 0 0 0 0 0
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0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
158
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
0
Reset
0
0 Reset
0
0
Reset
0
0
Reset
0
0
Reset