Espressif ESP32 Technical Reference Manual page 569

21 Two-wire Automotive Interface (TWAI)
Name
TWAI_BUS_TIMING_0_REG
TWAI_BUS_TIMING_1_REG
TWAI_ERR_WARNING_LIMIT_REG
TWAI_DATA_0_REG
TWAI_DATA_1_REG
TWAI_DATA_2_REG
TWAI_DATA_3_REG
TWAI_DATA_4_REG
TWAI_DATA_5_REG
TWAI_DATA_6_REG
TWAI_DATA_7_REG
TWAI_DATA_8_REG
TWAI_DATA_9_REG
TWAI_DATA_10_REG
TWAI_DATA_11_REG
TWAI_DATA_12_REG
TWAI_CLOCK_DIVIDER_REG
Control Registers
TWAI_CMD_REG
Status Registers
TWAI_STATUS_REG
TWAI_ARB_LOST_CAP_REG
TWAI_ERR_CODE_CAP_REG
TWAI_RX_ERR_CNT_REG
TWAI_TX_ERR_CNT_REG
TWAI_RX_MESSAGE_CNT_REG
Interrupt Registers
TWAI_INT_RAW_REG
TWAI_INT_ENA_REG
21.7 Registers
The addresses in parenthesis besides register names are the register addresses relative to the TWAI base ad-
dress provided in Table 1-6
addresses are listed in Section
Espressif Systems
Description
Bus Timing Register 0
Bus Timing Register 1
Error Warning Limit Register
Data Register 0
Data Register 1
Data Register 2
Data Register 3
Data Register 4
Data Register 5
Data Register 6
Data Register 7
Data Register 8
Data Register 9
Data Register 10
Data Register 11
Data Register 12
Clock Divider Register
Command Register
Status Register
Arbitration Lost Capture Register
Error Code Capture Register
Receive Error Counter Register
Transmit Error Counter Register
Receive Message Counter Reg-
ister
Interrupt Register
Interrupt Enable Register
Peripheral Address Mapping in Chapter
21.6 Register Summary.
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Address Access
0x3FF6B018 RO | R/W
0x3FF6B01C RO | R/W
0x3FF6B034 RO | R/W
0x3FF6B040 WO | R/W
0x3FF6B044 WO | R/W
0x3FF6B048 WO | R/W
0x3FF6B04C WO | R/W
0x3FF6B050 WO | R/W
0x3FF6B054 WO | R/W
0x3FF6B058 WO | R/W
0x3FF6B05C WO | R/W
0x3FF6B060 WO | RO
0x3FF6B064 WO | RO
0x3FF6B068 WO | RO
0x3FF6B06C WO | RO
0x3FF6B070 WO | RO
0x3FF6B07C varies
0x3FF6B004 WO
0x3FF6B008 RO
0x3FF6B02C RO
0x3FF6B030 RO
0x3FF6B038 RO | R/W
0x3FF6B03C RO | R/W
0x3FF6B074 RO
0x3FF6B00C RO
0x3FF6B010 R/W
Memory. The absolute register
ESP32 TRM (Version 5.2)