Espressif ESP32 Technical Reference Manual page 121

5 DPort Registers
Register 5.193. DPORT_DMMU_TABLEn_REG (n: 0-15) (0x544+4*n)
31
0 0 0 0 0 0 0
DPORT_DMMU_TABLEn
tively. (R/W)
31
0 0 0 0 0 0 0
DPORT_SPI_SPI3_DMA_CHAN_SEL Selects DMA channel for SPI3. (R/W)
DPORT_SPI_SPI2_DMA_CHAN_SEL Selects DMA channel for SPI2. (R/W)
DPORT_SPI_SPI1_DMA_CHAN_SEL Selects DMA channel for SPI1. (R/W)
Espressif Systems
0 0 0 0 0 0 0 0
MMU for internal SRAM. When
Register 5.194. DPORT_SPI_DMA_CHAN_SEL_REG (0x5A8)
0 0 0 0 0 0 0 0
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0 0 0 0 0 0 0 0
n is 0 ~ 15, the reset value is 0 ~ 15, respec-
0 0 0 0 0 0 0 0
121
7 6
0 0 0000000
6 5 4 3 2 1
0 0 0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
Reset
0
0 Reset