Espressif ESP32 Technical Reference Manual page 43

3 Reset and Clock
APLL_CLK
*SEL_0: The value of register
*SEL_1: The value of register
3.2.4 Peripheral Clock
Peripheral clocks include APB_CLK, REF_TICK, LEDC_SCLK, APLL_CLK, and PLL_F160M_CLK.
Table 3-4 shows which clocks can be used by which peripherals.
Peripherals
EMAC
TIMG
I2S
UART
RMT
LED PWM
PWM
I2C
SPI
PCNT
eFuse Controller
SDIO Slave
SDMMC
3.2.4.1 APB_CLK
The APB_CLK frequency is determined by CPU_CLK source, as detailed in Table 3-5.
3.2.4.2 REF_TICK
REF_TICK is derived from APB_CLK. The APB_CLK frequency is determined by CPU_CLK source. The REF_TICK
frequency should be fixed. When CPU_CLK source changes, users need to make sure the REF_TICK frequency
remains unchanged by setting a correct divider value.
Clock divider registers are shown in Table 3-6.
Espressif Systems
3 1 CPU_CLK = APLL_CLK / 2
RTC_CNTL_SOC_CLK_SEL
CPU_CPUPERIOD_SEL
Table 3-4. Peripheral Clock Usage
APB_CLK REF_TICK
Y N
Y N
Y N
Y Y
Y Y
Y Y
Y N
Y N
Y N
Y N
Y N
Y N
Y N
Table 3-5. APB_CLK
CPU_CLK Source
PLL_CLK
APLL_CLK
XTL_CLK
RC_FAST_CLK
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LEDC_SCLK APLL_CLK
N Y
N N
N Y
N N
N N
Y N
N N
N N
N N
N N
N N
N N
N N
APB_CLK Frequency
80 MHz
CPU_CLK / 2
CPU_CLK
CPU_CLK
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PLL_F160M_CLK
N
N
Y
N
N
N
Y
N
N
N
N
N
N
ESP32 TRM (Version 5.2)