Espressif ESP32 Technical Reference Manual page 527

20 eFuse Controller
When the value of BLK3_part_reserve is 0, coding_scheme, BLOCK1, BLOCK2, and BLOCK3 can be set to any
value.
When the value of BLK3_part_reserve is 1, coding_scheme BLOCK1 BLOCK2 and BLOCK3 are controlled by
3/4 coding scheme. Meanwhile, BLOCK3[143 : 96], namely,
20.3.2 Programming of System Parameters
The programming of variable-length system parameters BLOCK1, BLOCK2, and BLOCK3 is different from that of
the fixed-length system parameters. We program the
ters BLOCK1, BLOCK2, and BLOCK3 instead of directly programming the system parameters. The bit width
e
of BLOCKN [255 : 0] is always 256. Fixed-length system parameters, in contrast, are programmed without
encoding them first.
Each bit of the 30 fixed-length system parameters and the three encoded variable-length system parameters
corresponds to a program register bit, as shown in Table 20-3. The register bits will be used when programming
system parameters.
System parameter
Name
efuse_wr_disable
efuse_rd_disable
flash_crypt_cnt
uart_download_dis
WIFI_MAC_Address
disable_app_cpu
disable_bt
pkg_version
disable_cache
SPI_pad_config_hd
BLK3_part_reserve
CK8M Frequency
XPD_SDIO_REG
SDIO_TIEH
sdio_force
SPI_pad_config_clk
SPI_pad_config_q
SPI_pad_config_d
SPI_pad_config_cs0
vol_level_hp_inv
dig_vol_l6
flash_crypt_config
Espressif Systems
Table 20-3. Program Registers
Width Bit
16 [15:0]
4 [3:0]
7 [6:0]
1 [0]
[31:0]
56
[55:32]
1 [0]
1 [0]
4 [3:0]
1 [0]
5 [4:0]
1 [0]
8 [7:0]
1 [0]
1 [0]
1 [0]
5 [4:0]
5 [4:0]
5 [4:0]
5 [4:0]
2 [1:0]
4 [3:0]
4 [3:0]
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e
BLOCK3[191 : 128] is unavailable.
e
BLOCKN [255 : 0] value of encoded system parame-
Name
EFUSE_BLK0_WDATA0_REG
EFUSE_BLK0_WDATA1_REG
EFUSE_BLK0_WDATA2_REG
EFUSE_BLK0_WDATA3_REG
EFUSE_BLK0_WDATA4_REG
EFUSE_BLK0_WDATA5_REG
527
Register
Bit
[15:0]
[19:16]
[26:20]
[27]
[31:0]
[23:0]
[0]
[1]
[2], [11:9]
[3]
[8:4]
[14]
[7:0]
[14]
[15]
[16]
[4:0]
[9:5]
[14:10]
[19:15]
[23:22]
[27:24]
[31:28]
ESP32 TRM (Version 5.2)