Espressif ESP32 Technical Reference Manual page 668

30 ULP Coprocessor (ULP)
30.4.1.2 Operations with Immediate Value
31 28 27
4'd7 3'b1
Figure 30-4. Instruction Type — ALU for Operations with Immediate Value
When bits [27:25] of the instruction in Figure
R[0-3] and the immediate value stored in [19:4]. The types of operations depend on the setting of the
instruction's bits [24:21] presented in Table 30-2.
Operand Description - see Figure
ALU_sel Type of ALU operation
Rdst Register R[0-3], destination
Rsrc1 Register R[0-3], source
Imm 16-bit signed value
ALU_sel Instruction
0 ADD
1 SUB
2 AND
3 OR
4 MOVE
5 LSH
6 RSH
Note:
• ADD/SUB operations can be used to set/clear the overflow flag in ALU.
• All ALU operations can be used to set/clear the zero flag in ALU.
30.4.1.3 Operations with Stage Count Register
31 28 27
4'd7 3'b2
Figure 30-5. Instruction Type — ALU for Operations with Stage Count Register
ALU is also able to increment/decrement by a given value, or reset the 8-bit register Stage_cnt. To do so, bits
[27:25] of instruction in Figure
the instruction's bits [24:21] presented in Table 30-3. The Stage_cnt is a separate register and is not a part of
the instruction in Figure 30-5.
Operand Description - see Figure
ALU_sel Type of ALU operation
Stage_cnt Stage count register, a separate register [7:0] used to store variables, such as loop index
Imm 8-bit value
Espressif Systems
25 24 21 19
ALU_sel
30-4
30-4
Operation
Rdst = Rsrc1 + Imm
Rdst = Rsrc1 - Imm
Rdst = Rsrc1 & Imm
Rdst = Rsrc1 | Imm
Rdst = Imm
Rdst = Rsrc1 << Imm
Rdst = Rsrc1 >> Imm
Table 30-2. ALU Operations with Immediate Value
25 24 21
ALU_sel
30-5 should be set to 3'b2. The type of operation depends on the setting of
30-5
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Imm
are set to 3'b1, ALU performs operations, using register
Description
Add to register
Subtract from register
Bitwise logical AND of two operands
Bitwise logical OR of two operands
Move to register
Bit shifting left
Bit shifting right
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4 3 2 1 0
Rsrc1 Rdst
4
Imm
ESP32 TRM (Version 5.2)