Espressif ESP32 Technical Reference Manual page 175

8 SDIO Slave Controller
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SLC0INT_SLC_FRHOST_BIT3_INT_CLR Set this bit to clear
rupt. (WO)
SLC0INT_SLC_FRHOST_BIT2_INT_CLR Set this bit to clear
rupt. (WO)
SLC0INT_SLC_FRHOST_BIT1_INT_CLR Set this bit to clear
rupt. (WO)
SLC0INT_SLC_FRHOST_BIT0_INT_CLR Set this bit to clear
rupt. (WO)
31 30 29 28 27
0 0 0 0 0 0 0
SLC0RX_SLC0_RXLINK_RESTART Set this bit to restart and continue the linked list operation for
sending packets. (R/W)
SLC0RX_SLC0_RXLINK_START Set this bit to start the linked list operation for sending packets.
Sending will start from the address indicated by SLC0_RXLINK_ADDR. (R/W)
SLC0RX_SLC0_RXLINK_STOP Set this bit to stop the linked list operation. (R/W)
SLC0RX_SLC0_RXLINK_ADDR The lowest 20 bits in the initial address of Slave's sending linked list.
(R/W)
Espressif Systems
Register 8.5. SLC0INT_CLR_REG (0x10)
Register 8.6. SLC0RX_LINK_REG (0x3C)
20 19
0 0 0 0 0
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SLC0INT_SLC_FRHOST_BIT3_INT
SLC0INT_SLC_FRHOST_BIT2_INT
SLC0INT_SLC_FRHOST_BIT1_INT
SLC0INT_SLC_FRHOST_BIT0_INT
0x000000
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Reset
ESP32 TRM (Version 5.2)