Espressif ESP32 Technical Reference Manual page 544

20 eFuse Controller
31
0 0 0 0 0 0 0
EFUSE_DAC_CLK_DIV eFuse timing configuration register. (R/W)
31
0 0 0 0 0 0 0
EFUSE_DEC_WARNINGS If a bit is set in this register, it means some errors were corrected while
decoding the 3/4 encoding scheme. (RO)
Espressif Systems
Register 20.28. EFUSE_DAC_CONF_REG (0x118)
0 0 0 0 0 0 0 0
Register 20.29. EFUSE_DEC_STATUS_REG (0x11c)
0 0 0 0 0 0 0 0
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0 0 0 0 0 0 0 0
12 11
0 0 0 0 0 0 0 0
544
8 7
0 40
0 0 0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
Reset
0
0
Reset