Espressif ESP32 Technical Reference Manual page 244

10 Ethernet Media Access Controller (MAC)
Bits Name
[31:29] SAIC: SA Insertion Control
[28:16] Reserved
[15:13] Reserved
TBS1: Transmit Buffer 1
[12:0]
Size
Bits Name
[31:0] Buffer 1 Address Pointer
Bits Name
[31:0] Next Descriptor Address
10.8.2 Receive Descriptors
The structure of the receiver linked lists is shown in Figure 10-10. Table
of the linked lists.
Espressif Systems
Table 10-6. Transmit Descriptor 1 (TDES1)
Description
These bits request the MAC to add or replace the Source Address
field in the Ethernet frame with the value given in the MAC Address
0 register. If the Source Address field is modified in a frame, the
MAC automatically recalculates and replaces the CRC bytes. The
Bit[31] specifies the MAC Address Register value (1 or 0) that is
used for Source Address insertion or replacement. The following
list describes the values of Bits[30:29]:
• 2'b00: Do not include the source address.
• 2'b01: Include or insert the source address. For reliable
transmission, the application must provide frames without
source addresses.
• 2'b10: Replace the source address. For reliable transmis-
sion, the application must provide frames with source ad-
dresses.
• 2'b11: Reserved
These bits are valid when the First Segment control bit
(TDES0[28]) is set.
Reserved
Reserved
These bits indicate the data buffer byte size in bytes. If this field
is 0, the DMA ignores this buffer and uses Buffer 2 or the next
descriptor.
Table 10-7. Transmit Descriptor 2 (TDES2)
Description
These bits indicate the physical address of Buffer 1.
Table 10-8. Transmit Descriptor 3 (TDES3)
Description
This address contains the pointer to the physical memory where
the Next Descriptor is present.
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10-9 to Table 10-13 provide the description
ESP32 TRM (Version 5.2)