Espressif ESP32 Technical Reference Manual page 164

8 SDIO Slave Controller
8.3.5.1 Sending Packets to SDIO Host
The transmission of packets from Slave to Host is initiated by the Slave. The Host will be notified with an
interrupt (for detailed information on interrupts, please refer to SDIO protocol). After the Host reads the
relevant information from the Slave, it will initiate an SDIO bus transaction accordingly. The whole procedure is
illustrated in Figure 8-6.
When the Host is interrupted, it reads relevant information from the Slave by visiting registers SLC0HOST_INT
and SLCHOST_PKT_LEN.
• SLC0HOST_INT: Interrupt status register. If the value of SLC0_RX_NEW_PACKET_INT_ST is 1, this
indicates that the Slave has a packet to send.
• SLCHOST_PKT_LEN: Packet length accumulator register. The current value minus the value of last time
equals the packet length sent this time.
In order to start DMA, the CPU needs to write the low 20 bits of the address of the first linked-list element to
Espressif Systems
Figure 8-6. Packet Sending Procedure (Initiated by Slave)
Submit Documentation Feedback
164 ESP32 TRM (Version 5.2)