Espressif ESP32 Technical Reference Manual page 267

10 Ethernet Media Access Controller (MAC)
31 30
0 0 0 0 0 0 0
RECEIVE_ALL When this bit is set, the MAC Receiver module passes all received frames, irrespec-
tive of whether they pass the address filter or not, to the Application. The result of the SA or DA
filtering is updated (pass or fail) in the corresponding bits in the Receive Status Word. When this
bit is reset, the Receiver module passes only those frames to the Application that pass the SA
or DA address filter. (R/W)
SAFE When this bit is set, the MAC compares the SA field of the received frames with the values
programmed in the enabled SA registers. If the comparison fails, the MAC drops the frame.
When this bit is reset, the MAC forwards the received frame to the application with updated SAF
bit of the Rx Status depending on the SA address comparison. (R/W)
SAIF When this bit is set, the Address Check block operates in inverse filtering mode for the SA
address comparison. The frames whose SA matches the SA registers are marked as failing the
SA Address filter. When this bit is reset, frames whose SA does not match the SA registers are
marked as failing the SA Address filter. (R/W)
PCF These bits control the forwarding of all control frames (including unicast and multicast Pause
frames). (R/W)
• 2'b00: MAC filters all control frames from reaching the application.
• 2'b01: MAC forwards all control frames except Pause frames to application even if they fail
the Address filter.
• 2'b10: MAC forwards all control frames to application even if they fail the Address Filter.
• 2'b11: MAC forwards control frames that pass the Address Filter.
The following conditions should be true for the Pause frames processing:
• Condition 1: The MAC is in the full-duplex mode and flow control is enabled by setting Bit
2 (RFE) of Register (Flow Control Register) to 1.
• Condition 2: The destination address (DA) of the received frame matches the special mul-
ticast address or the MAC Address 0 when Bit 3 (UP) of the Register(Flow Control Register)
is set.
• Condition 3: The Type field of the received frame is 0x8808 and the OPCODE field is 0x0001.
DBF When this bit is set, the AFM(Address Filtering Module) module blocks all incoming broadcast
frames. In addition, it overrides all other filter settings. When this bit is reset, the AFM module
passes all received broadcast frames. (R/W)
PAM When set, this bit indicates that all received frames with a multicast destination address (first
bit in the destination address field is '1') are passed. (R/W)
Continued on the next page...
Espressif Systems
Register 10.16. EMACFF_REG (0x1004)
0 0 0 0 0 0 0 0
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10 9
0 0 0 0 0 0 0 0
267
8 7 6 5 4 3 2 1
0 0x0 0 0 0 0 0
ESP32 TRM (Version 5.2)
0
0
Reset