Espressif ESP32 Technical Reference Manual page 604

25 Random Number Generator (RNG)
25 Random Number Generator (RNG)
25.1 Introduction
The ESP32 contains a true random number generator, which generates 32-bit random numbers that can be
used for cryptographical operations, among other things.
25.2 Feature
The random number generator generates true random numbers, which means random number generated from
a physical process, rather than by means of an algorithm. No number generated within the specified range is
more or less likely to appear than any other number.
25.3 Functional Description
Every 32-bit value that the system reads from the
a true random number. These true random numbers are generated based on the thermal noise in the system
and the asynchronous clock mismatch.
Thermal noise comes from the high-speed ADC or SAR ADC or both. Whenever the high-speed ADC or SAR
ADC is enabled, bit streams will be generated and fed into the random number generator through an XOR logic
gate as random seeds.
SAR ADC
High Speed
ADC
RC_FAST_CLK
When there is noise coming from the SAR ADC, the random number generator is fed with a 2-bit entropy in one
clock cycle of RC_FAST_CLK (8 MHz), which is generated from an internal RC oscillator (see Chapter
Clock for details). Thus, it is advisable to read the
obtain the maximum entropy.
When there is noise coming from the high-speed ADC, the random number generator is fed with a 2-bit entropy
in one APB clock cycle, which is normally 80 MHz. Thus, it is advisable to read the
a maximum rate of 5 MHz to obtain the maximum entropy.
A data sample of 2 GB, which is read from the random number generator at a rate of 5 MHz with only the high-
speed ADC being enabled, has been tested using the Dieharder Random Number Testsuite (version 3.31.1). The
sample passed all tests.
Espressif Systems
RNG_DATA_REG
Random bit
seeds
XOR
Random bit
seeds
Random bit
seeds
Figure 25-1. Noise Source
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register of the random number generator is
XOR
Random
Number
Generator
RNG_DATA_REG register at a maximum rate of 500 kHz to
604
RNG_DATA_REG
Reset and
RNG_DATA_REG register at
ESP32 TRM (Version 5.2)